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内核启动时,报断点异常
来源: 互联网 发布时间:2016-07-10
本文导语: mips的板子 start_kernel的时候,当运行到start_kernel的local_irq_enable()时,系统挂了,报错说23号异常处理函数找不到。 于是我就查手册,发现23号异常,代表的是断点异常。 我通过 把WatchLo和WatchHi打印出来,发现WatchLo...
mips的板子
start_kernel的时候,当运行到start_kernel的local_irq_enable()时,系统挂了,报错说23号异常处理函数找不到。
于是我就查手册,发现23号异常,代表的是断点异常。
我通过 把WatchLo和WatchHi打印出来,发现WatchLo寄存器是0,WatchHi寄存器是1
__u32 watch_regh0= read_c0_watchhi0();
__u32 watch_regl0= read_c0_watchlo0();
也就是说,r,w位都是0,照理说不应该发生这个断点异常啊,为何我这里内核启动时,会报这个错误?
是哪里没有设置对?
我仍然不甘心,又试图将WatchHi置0,但发现执行了
write_c0_watchhi0(0)后,读取出来的WatchHi数据仍然是1,没有改变
Hi all,
I've got some problem when booting mips32.
I got a Num.23 trap when calling start_kernel ---> local_irq_enable
irq 23, desc: 802a98a0, depth: 1, count: 0, unhandled: 0
->handle_irq(): 80148c6c, handle_bad_irq+0x0/0x2b4
->chip(): 8029f738, 0x8029f738
->action(): 00000000
IRQ_DISABLED set
unexpected IRQ # 23
Num.23 trap is a Watch trap, which means that, when
"Physical address of load/store matched enabled value in
WatchLo/ WatahHi registers." happened, Num 23 trap was triggered by cpu.
So I used macro
__u32 watch_regh0= read_c0_watchhi0();
__u32 watch_regl0= read_c0_watchlo0();
to retrieve value from WatchHi and WatchLo,found them 0x1 and 0x0 respectively,which mean that ,
'r' together with 'w' bits were set to zero and no trap should be triggered.
But now , I got a 23 trap, why ?
At last , I used write_c0_watchhi0(0) to set WatchHi to 0x0, but failed when found it was still 0x1 after
calling write_c0_watchhi0(0)
Any suggestion would be grateful.
start_kernel的时候,当运行到start_kernel的local_irq_enable()时,系统挂了,报错说23号异常处理函数找不到。
于是我就查手册,发现23号异常,代表的是断点异常。
我通过 把WatchLo和WatchHi打印出来,发现WatchLo寄存器是0,WatchHi寄存器是1
__u32 watch_regh0= read_c0_watchhi0();
__u32 watch_regl0= read_c0_watchlo0();
也就是说,r,w位都是0,照理说不应该发生这个断点异常啊,为何我这里内核启动时,会报这个错误?
是哪里没有设置对?
我仍然不甘心,又试图将WatchHi置0,但发现执行了
write_c0_watchhi0(0)后,读取出来的WatchHi数据仍然是1,没有改变
Hi all,
I've got some problem when booting mips32.
I got a Num.23 trap when calling start_kernel ---> local_irq_enable
irq 23, desc: 802a98a0, depth: 1, count: 0, unhandled: 0
->handle_irq(): 80148c6c, handle_bad_irq+0x0/0x2b4
->chip(): 8029f738, 0x8029f738
->action(): 00000000
IRQ_DISABLED set
unexpected IRQ # 23
Num.23 trap is a Watch trap, which means that, when
"Physical address of load/store matched enabled value in
WatchLo/ WatahHi registers." happened, Num 23 trap was triggered by cpu.
So I used macro
__u32 watch_regh0= read_c0_watchhi0();
__u32 watch_regl0= read_c0_watchlo0();
to retrieve value from WatchHi and WatchLo,found them 0x1 and 0x0 respectively,which mean that ,
'r' together with 'w' bits were set to zero and no trap should be triggered.
But now , I got a 23 trap, why ?
At last , I used write_c0_watchhi0(0) to set WatchHi to 0x0, but failed when found it was still 0x1 after
calling write_c0_watchhi0(0)
Any suggestion would be grateful.
|
4Kec?
那你要注册这个异常处理函数,或者Mask掉他,不要让他产生异常.
你用的是哪来的代码啊?我没有印象这部分要做什么特别的处理。
那你要注册这个异常处理函数,或者Mask掉他,不要让他产生异常.
你用的是哪来的代码啊?我没有印象这部分要做什么特别的处理。
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action(): 00000000
发生中断后由默认的处理处理,发生异常吧
发生中断后由默认的处理处理,发生异常吧
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没用过Mips~